1. Field of Invention
The present invention relates to electro-optical devices provided with semiconductor layers formed on substrates, and to electronic equipment using the same. In particular, the present invention relates to an electro-optical device in which each gate-electrode provided on a semiconductor layer extends in the longitudinal direction of a gate so that the ends of the gate electrode are disposed outside the semiconductor layer. The invention also relates to an electronic equipment using the electro-optical device.
2. Description of Related Art
Hitherto, an SOI technology for depositing a thin silicon film on an insulative substance, and forming a semiconductor device on the thin silicon film has been widely studied because the technology contributes to elements having increased speed, reduced power consumption, greater levels of integration, and the like.
An SOI technology is a technology for manufacturing an SOI substrate by bonding monocrystalline-silicon substrates. This technology, generally called a bonding method, is a method for bonding a monocrystalline-silicon substrate with a supporting substrate by using a hydrogen bonding force, reinforcing the bonding force by heat treatment, and grinding and polishing the monocrystalline-silicon substrate; or a method for forming a thin monocrystalline-silicon layer on a supporting substrate by etching. By this method, in which a thin film is made directly from a monocrystalline-silicon substrate, a highly efficient device having superior crystallinity in the thin silicon film is obtainable.
Other methods using the bonding method are known. In one method, a monocrystalline-silicon substrate is doped with hydrogen ion, the monocrystalline-silicon substrate is bonded to a supporting substrate, and a thin silicon layer is separated from a hydrogen-doped region of the monocrystalline-silicon substrate by heat treatment (U.S. Pat. No. 5,374,564). In another method, a monocrystalline-silicon layer is epitaxially grown on a porous surface of a silicon substrate, the silicon substrate is bonded to a supporting substrate, then the silicon substrate is removed, and the porous silicon layer is etched, thereby forming an epitaxial monocrystalline thin silicon film on the supporting substrate (Japanese Unexamined Patent Application Publication No. 4-346418). SOI substrates manufactured by these bonding methods are used for various devices in the same way as conventional bulk semiconductor substrates. A feature of the SOI substrates which is different from that of the conventional bulk substrates is that different types of material can be used for the supporting substrates. Transparent quartz and glass substrates other than conventional silicon substrates can be used. By forming a thin monocrystalline-silicon film on the transparent substrate, a highly efficient transistor element can be provided by using monocrystalline silicon having superior crystallinity for a device which requires light transmissibility, such as a light-transmissive liquid crystal display device.
In a MOSFET (metal oxide semiconductor field effect transistor) element on a conventional silicon substrate, a parasitic MOSFET is prevented from being driven by setting the concentration of impurity in a region under a field oxide film (so-called LOCOS), which separates a MOSFET region, to a concentration higher than that in the well.
In an electro-optical device such as a liquid crystal device, each transistor element which constitutes a switching unit of, for example, a TFT array is completely separated by an oxide insulating film. In this case, a parasitic MOSFET is produced at an edge of a semiconductor layer forming the transistor element, as shown in FIG. 4 and FIG. 5.
FIG. 4 is a sectional view of a TFT in the gate-width direction, in which a so-called mesa-etching method is used for separating a semiconductor layer. A gate oxide film 2 is formed on a semiconductor layer 1 which is mesa-etched. The gate oxide film 2 is provided with a gate electrode 3 formed thereon. In the above-described configuration, an electric field is concentrated to a shoulder 40, shown by the circle in FIG. 4, of an edge of the semiconductor layer 1. Therefore, a parasitic MOSFET in this part has a threshold lower than the desired threshold. In order to suppress the parasitic MOSFET, dopant concentration in the shoulder 40 of the edge of the semiconductor layer 1 has been hitherto increased.
FIG. 5 is a sectional view of a TFT in the gate-width direction, in which a so-called LOCOS separation method is used for separating a semiconductor layer. When the gate electrode 3 is formed by gate-oxidizing the semiconductor layer 1 separated by LOCOS separation, the film thickness at an edge 50, shown by the circle in FIG. 5, of the semiconductor layer 1 is reduced. Therefore, the parasitic MOSFET in this part has a threshold lower than the desired threshold. In order to suppress the parasitic MOSFET, dopant concentration in the edge 50 of the semiconductor layer 1 has been hitherto increased.
As described above, the parasitic MOSFET at an edge of the semiconductor layer constituting the transistor element can be prevented from being produced by increasing the dopant concentration in that part. Generally, it is necessary to select doping regions by a photolithographic process for forming regions in which the dopant concentration is high. In order to activate the implanted dopant, an annealing process is needed. In the annealing process, the implanted dopant is diffused. The above-described regions in which the dopant concentration is increased are determined by two factors, which are the accuracy in the photolithographic process and the extent of the diffusion of the dopant.
However, it is difficult to accurately form regions in which the dopant concentration is increased. Because the region in which the dopant concentration is increased determines the width of a transistor, when transistor elements thus formed are used for switching elements of a liquid crystal and the like, there is a risk of causing variation in the performance of each element and irregularity in display.
Accordingly, an exemplary object of the present invention is to at least provide an electro-optical device and an electronic equipment using the same, in which transistor elements, each formed with a semiconductor layer laminated with an insulating film, are prevented from malfunctioning due to a parasitic MOSFET, and the electrical characteristic of each element can be uniform.
An electro-optical device according to an exemplary embodiment of the present invention preferably consists of: a substrate; a plurality of scanning lines provided on the substrate; a plurality of data lines crossing the plurality of scanning lines; a plurality of transistors formed with-gate electrodes having ends in a gate-width direction and ends in a gate-length direction, each transistor being connected to one of the scanning lines and one of the data lines; and pixel electrodes connected to the transistors. In the electro-optical device of this exemplary embodiment, at least one portion of the ends in the gate-width direction of each of the gate electrodes forming the transistors is disposed in a semiconductor region forming the transistor, and the ends in the gate-length direction of each of the gate electrodes extend outside of the semiconductor region forming the transistor.
With this arrangement according to this exemplary embodiment of the present invention, a parasitic MOSFET may be suppressed by providing the gate electrodes at the ends of each channel region of the semiconductor layer. By extending the ends in the gate-length direction of the gate electrodes, the gate electrodes may be easily separated from the source-drain regions. The gate width of each transistor may be set only by etching of the gate electrode, thereby suppressing variation between each transistor in the gate width.
In the electro-optical device according to this exemplary embodiment of the present invention, a semiconductor layer forming the transistor may include monocrystalline silicon.
With this arrangement according to this exemplary embodiment of the present invention, elements having superior performance may be manufactured by making the semiconductor layer from monocrystalline silicon.
In the electro-optical device according to this exemplary embodiment of the present invention, the semiconductor layer forming the transistor may include polycrystalline silicon.
With this arrangement according to this exemplary embodiment of the present invention, the electro-optical device may be manufactured at a low cost.
In the electro-optical device according to this exemplary embodiment of the present invention, the substrate may be made of an insulative substance. With this arrangement according to this exemplary embodiment of the present invention, a transparent may be used, whereby the substrate may be used for an electro-optical device which requires light-transmissibility.
In the electro-optical device according to this exemplary embodiment of the present invention, the substrate may be a quartz substrate. With this arrangement according to this exemplary embodiment of the present invention, high-temperature processes of not less than 1000xc2x0 C. may be applied by using the quartz substrate, whereby elements having superior performance may be manufactured.
In the electro-optical device according to this exemplary embodiment of the present invention, the substrate may be a glass substrate.
With this arrangement according to this exemplary embodiment of the present invention, elements may be formed on a substrate having a large area by using the glass substrate, thereby reducing manufacturing cost of the electro-optical device.
An electro-optical device according to another exemplary embodiment of the present invention preferably consists of: a substrate; a plurality of scanning lines provided on the substrate; a plurality of data lines crossing the plurality of scanning lines; a plurality of transistors formed with gate electrodes having ends in a gate-width direction and ends in a gate-length direction, cach transistor being connected to one of the scanning lines and one of the data lines; and pixel electrodes connected to the transistors. In the electro-optical device of this exemplary embodiment, at least one portion of the ends in the gate-width direction of each of the gate electrodes forming the transistors is disposed in a semiconductor region forming the transistor, the ends in the gate-length direction of each of the gate electrodes extend toward the outside of the semiconductor region forming the transistor, and at least one of the ends in the gate-width direction of a channel region of each transistor is electrically connectable.
With this arrangement according to this exemplary embodiment of the present invention, a so-called stray effect in the substrate may be suppressed by electrically connecting the channel regions of the transistors, whereby an electro-optical device having high potential-resistance between the source and drain may be provided.
In the electro-optical device according to this exemplary embodiment of the present invention, a line to be electrically connected to the channel region of each transistor may be a capacitance line.
With this arrangement according to this exemplary embodiment of the present invention, it is not necessary to prepare particular wires for electrical connection of the channel regions of the transistors. The aperture ratio in a light-transmissive electro-optical device may be increased, and an electro-optical device having high brightness may be manufactured.
In the electro-optical device according to this exemplary embodiment of the present invention, the transistors may be P-channel transistors for supplying ground potential to the capacitance lines electrically connected to the channel regions of the P-channel transistors.
With this arrangement according to this exemplary embodiment of the present invention, the potential-resistance between the source and drain of each of the P-channel transistors may be increased by supplying ground potential to the channel regions of the P-channel transistors. It is not necessary to provide additional potential because the electric potential to be supplied is ground potential.
In the electro-optical device according to this exemplary embodiment of the present invention, the transistors may be N-channel transistors for supplying ground potential to the capacitance lines electrically connected to the channel regions of the N-channel transistors.
With this arrangement according to this exemplary embodiment of the present invention, the potential-resistance between the source and drain of each of the N-channel transistors may be increased by supplying ground potential to the channel regions of the N-channel transistors. It is not necessary to provide additional potential because the electric potential to be supplied is ground potential.
In the electro-optical device according to this exemplary embodiment of the present invention, a semiconductor layer forming the transistor may include monocrystalline silicon.
With this arrangement according to this exemplary embodiment of the present invention, elements having superior performance may be manufactured.
In the electro-optical device according to this exemplary embodiment of the present invention, the semiconductor layer forming the transistor may include polycrystalline silicon.
With this arrangement according to this exemplary embodiment the present invention, the manufacturing cost of the electro-optical device may be reduced.
In the electro-optical device according to this exemplary embodiment of the present invention, the substrate may be made of an insulative substance.
With this arrangement according to this exemplary embodiment of the present invention, a transparent substrate can be used, whereby the substrate may be used for an electro-optical device which requires light-transmissibility.
In the electro-optical device according to this exemplary embodiment of the present invention, the substrate may be a quartz substrate.
With this arrangement according to this exemplary embodiment of the present invention, high-temperature processes of not less than 1000xc2x0 C. may be applied by using the quartz substrate, whereby elements having superior performance may be manufactured.
In the electro-optical device according to this exemplary embodiment of the present invention, the substrate may be a glass substrate.
With this arrangement according to this exemplary embodiment the present invention, elements may be formed on a substrate having a large area by using the glass substrate, thereby at least reducing manufacturing cost of the electro-optical device.
The electro-optical device according to this exemplary embodiment of the present invention may further include another substrate disposed opposing the surface of the substrate provided with the semiconductor layers, and liquid crystals sandwiched by the two substrates and driven by transistor elements formed on the semiconductor layers.
According to yet another exemplary embodiment of the present invention, an electronic equipment preferably consists of a light source, the above-described electro-optical device for modulating, in accordance with image information, incident light emitted by the light source, and a projection medium for projecting the light modulated by the electro-optical device.